In this section we will look at the memory map, address decoding, memory devices and some other control signals that we need to get up and running for the computer.
The 6303 Micro has a 64K address range due to its 16 address lines. There are some key addresses that we need to know about and these are the interrupt vectors. The table below shows these vectors – these are memory locations that the Micro jumps to, when one of these interrupts are invoked. The purpose of these vectors is to tell the Micro what address it should look at to get the relevant instructions.
The most important of these is the Reset Vector, which is found at address locations FFFE and FFFF.
One simple method of managing the 64K memory map of the Micro is to break it up into smaller chunks. Back in the day, it was very common to break the memory map into 8 x 8K chunks and then to break these 8K chunks into small blocks.
As we plan to use a 32K RAM chip, we can use the address line A15 with a logic zero, to select this RAM chip. If we use a 74HC138 IC, which is a 3 to 8 line decoder, we can break up the upper 32K address space into 8 x 4K block. We can take the address line A15 with a logic high and the upper three address lines A14, A13 & A12 and use these to access each of these 8 x 4K memory blocks.
As each of the ROMs are 8K in size, we will need to combine two 4K blocksin the address map to get an 8K address block for the ROM. There are 2 x 4K address blocks that we will use for expansion and video RAM.
The two most important items in this memory map are RAM1 and ROM1. ROM1 contains the code that will be executed when the Micro starts, while RAM1 is the location where program data can be stored.
It is worth saying that the addresses from 0x0000 to 0x00FF are used internally by the mMicro, some of which are internal RAM and internal registers. Addresses 0x0100 to 0x01FF will be used by external I/O, which we will define at a later time. The map below provides a simple overview of what can be used and what cannot be used.
0x0000 -> 0x001F – Internal registers of the Micro.
0x0020 -> 0x007F – External RAM, that can be used.
0x0080 -> 0x00FF – Internal RAM in the Micro.
0x0100 -> 0x01FF – External I/O for the Micro.
0x0200 -> 0x7FFF – External RAM.
A simple 40 Column by 25 Row display will use 1K just for text, with no formatting information such as colours, blinking text, etc. Once we start to add foreground and background colours as well as other formatting, we find ourselves in the 4K region before we start.
Read & Write Enable
The Micro has a combined read & write line – the read control is active high and the write control is active low. When connected to some devices this is not a problem, but with other devices it can be very convenient to have separate read and write control lines.
This simple circuit provides the necessary signals from the combined Read/Write line and the E clock signal.
Memory (ROM & RAM)
The memory side of this computer is very simple and we could just start with only 8K of RAM and 8K of ROM to get the system operating. Then later on we could think about adding more of both memory type, but this is not a good idea, as we might design ourselves into a corner with no way out. We have to think about this problem, so we can modify the design to allow the computer to be expandable.
When writing code for this computer, we will run into another problem – how to get the code into the ROM to begin with. We can, of course use an EPROM programmer to program the base ROM. This is okay for the initial ROM, but if we want to make changes and test code, we won’t want to keep swapping out ROM’s all the time, with each change.
If the initial ROM (ROM1) is an EPROM and contains the basic code to get the system running and a system monitor (assembler), we can use this ROM to write programs in RAM, like a real computer. Then these programs can be tested in RAM and then copied to ROM2 or Ext ROM1, assuming these are EEPROM’s. This can help to speed up development on this computer.
As mentioned above, we can start with a basic 8K RAM – this will be perfect to get things up and running. We can add a second RAM and this will give another 8K RAM. Eventually we will run out of memory space to keep adding 8K RAM devices, so how can we add more RAM to the computer in the future, without having to re-design the computer?
One technique that was very common back in the day, was to page a RAM device. This was where the computer was able to access a certain amount of RAM at a specific moment in time. Then the computer would swap out that addressable range (page) on one device with the same addressable range (page) on a different device.
Think of it like a bookshelf – you start with just one book in your hands, as your eyes can only read one book at a time. When you’re finished reading or writing that book, you place it back on the shelf and take down the previous book or next book, to read or write. This is where the term “paging” came from – we are swapping one page of memory in and out. Only one page is active at a time.
To begin… if we had a 32K RAM, we could use address line A15 to select this RAM. But how could we page this RAM out? We would need to use some other control lines. If we had one pin of the Micro connected to control this RAM and another RAM, we could get a total of 64K RAM from one extra pin. If we had two control lines, then we could get up to 128K RAM in this computer. With a little bit of sideways thinking we could access more RAM memory, without giving up much of our memory map.
In the above circuit, you can see how you can use a 74HC139 and two control lines from the Micro and address line A15 to select one of four RAM IC’s.
The same logic can be applied to the ROMs.
