Category Archives: Retro Computer Project

Retro Computer Build Part 6 – PLD or Not 2 PLD

Having decided that I was going to use an Atmel ATF22LV10C PLD to manage the address decoding for this project, I purchased a couple of these IC’s to try out. I was visited by Murphy’s Law. I found out that the new programmer wouldn’t program these ICs (although it listed these as supported ICs). After searching some forums, I found that I wasn’t the only person having a problem programming these ICs on this model of programmer. It turned out that the problem was down to the flash memory in the Atmel PLD. It required some special timing to program the ICs, which this programmer did not support.

So, my second attempt into this problem was to purchase some National GAL22V10 ICs (which my programmer said it also supported), but did I believe them? After testing them on my programmer and finding that they also didn’t work, I was getting very frustrated (serves me right for buying a cheap Chinese one). I really didn’t  want to purchase a new programmer at that point, considering that it did work for other ICs.

Just to prove to myself that I was not losing it and that my grey matter was not shutting down, I tried some Lattice and National GAL16V8 ICs that I had in stock, and these programmed with no issue. I needed to rethink the address decoding, as I could use the  working parts that I had to hand.

I was not happy to add two additional ICs into the project where I wanted to use one. Could I remove another IC to keep the chip count the same as before? After looking at the schematic it was simple to see that the /RE & /WE signal lines could be incorporated into one of the GALs.

If the first GAL contained the logic for these decoder lines (/RE & /WE) as well as the address decoding for the memory map, the second GAL could be used for the address decoding of the I/O.

This all seemed like a good plan, but NO, there was one sneaky problem that had now crept back in. The current consumption then increased dramatically in the system. Before we even measured this, I estimated that these GALs would burn about 40-80mA each (80 – 160mA in total). This blew the power budget that I wanted as a limit for the system.

As low power consumption was a key prerequisite for this project and as I then could not use the PLDs, I had to look back to using basic logic devices for managing the address decoding. It looked as if we would have to use some 74HC138s and 74HC139s. In the end the chip count increased.

That was a month’s work and planning that I wasn’t getting back.

Now to refocus my attention to the address decoding, using standard logic ICs. 

All the memory devices require an active low control line and A15 will be high when the CPU is reset/starts. We can just use an inverter to get an active low signal from the A15 line which is high when the CPU starts. This is done by feeding A15 into a NAND gate 74HC00 (U4A), in an inverter configuration.

This active low A15 signal with A14 and A13, feed into a two to four line decoder 74HC139 (U5A), which allows us to cut the upper 32K memory space into 4 x 8K pages. Three of these pages can be used for our ROM memory which stores our software. The last 8K page can be used for future expansion, video memory and I/O.

This I/O control line can be fead into another NAND gate 74HC00 (U4B), with address line A9. This gives us a memory space of 512 bytes – it make better use of the memory space. We can feed this control line with A8 and A7 through A5, into a three to eight line decoder – 74HC138 (U10). This gives us 8 x 32 byte address blocks, which can be used for I/O devices such as RTC, UARTS, PIAs.

As we can see there are some unused memory spaces in the revised memory map. These can be used by other interfaces in the future.

Retro Computer Build Part 5 – Revised Address Decoder

So, after a couple of weeks since writing the first post about this Micro, I’m rethinking the address decoding and mapping of the same. Currently, address line A15 is being used to select between the lower 32K of memory and the upper 32K of memory. In the lower 32K of memory, I will page 32K block of RAM in and out, as needed. While the upper 32K of memory will be used for ROM and video RAM. I had previously suggested using a 3-8 line decoder to break up the upper 32K of memory into 4K chunks and then join a few of them to give 8K chunks. After a few days of writing the post about address decoding, I realised there were a few options available.

If I use a 2 to 4 line decoder (74HC139), I can use address lines A14 and A13 to break the upper 32K of memory into 4 x 8K blocks (which makes it easier for memory management). The upper 3 x 8K blocks can be used for firmware. I can potentially look at paging out one or two of these 8K blocks.

The lower 8K page can be sub divided into 4 x 2K blocks using another 2 to 4 line decoder (74HC139) on address lines A12 and A11. One of these 2K blocks can be used for basic video memory.  If I add a second or third 2K block this would give 4K or 6K of video memory, which would suffice for a basic 40 column x 25 line or 80 column by 25 line display (with some basic colours and cursor functions).

The lower 2K block can be sub divided into 8 x 256 byte pages for I/O. This is still allot of wasted address space for I/O, so what can be done to be more efficient with the memory usage?

We can use a programmable logic device , a “PLD”, to manage the control logic for the I/O. This way we can re-program the PLD at a future date to incorporate any additional changes to the I/O that we may want.

Using an Atmel ATF22LV10C will give us up to 10 outputs each, which can be individually assigned to one or more addresses. With up to 12 address inputs, the PLD makes it easier to map the control lines required. The unused pins on this device will be brought out to a header in case we need to use these pins at a later date. This is a  simpler solution to the multiple address decoders and additional logic ICs that potentially we were looking at.

When looking at the above revised memory map, we can see the I/O region is spread over 256 bytes of memory.

ATF22LC10C Datasheet

Years ago I used us a Hi-Lo Programmer that connected to my PC via an ISA card. This device was supplied with its own DOS program for taking Boolean logic and producing a map file which could be programmed into a PLD or a GAL. As I can’t use this anymore on modern PCs or a laptop, I need to find a more modern solution.

So I purchased a G540 programmer on eBay for very little money. The G540 was supplied with some adaptors for PLCC devices. A chip extractor was also supplied with this package. This programmer has a USB port, so it can connect to my laptop or desktop PC.

eBay G540 programmer

Atmel has a utility call WinCupl which allows you to write Boolean logic and create a map file which can be programmed into the 22LC10 PLD. I’ve never used this program before, so a little bit of study will be needed.


Retro Computer Build Part 4 – Initial Firmware

At this stage we have the main control signals of the Micro setup. The address decoder is also setup and I have some thoughts already on changing this. The first ROM is now connected as is the console port via the MAX222.

Now we need some code to load into the ROM to see if the computer is actually running. For this, we are going to use assembly language, which is the closest we can get to the bare metal of the CPU. We could go down to machine code level programming but this project is meant to be fun not torture!

We can see from the above screen shot that Assembly Language is easier to read than Machine Code. Yes, in the early days of computers, programs were developed in machine code, then assembly, then more higher level languages such as C and C++.

Today there are many different high level programming languages for computers, such as Python, Ruby and C# to name just a few. These high level languages are used to make programming easier and quicker for us humans, but the computer still needs machine code to run. So when a programmer is finished writing their program, they will compile the program  to produce code that will eventually run as machine code. This is a simplified version of what happens on your PC or Mac, but the end result is the same.

So we’re going to program in Assembly and for this  we will need a Cross Assembler. A Cross Assembler is a program that operates on one type of computer and produces code that will run on a different type of computer. I’m going to use the ASxxxx Cross Assembler program by Alan R. Baldwin, which can be found in the links below. This tool supports a wide range of CPU including the Z80 and 6502.

Another program that will be needed is a Text Editor. We can’t use programs such as Word, Pages or other modern word processor programs, as these add formatting data to the files that the ASxxxx Cross Assembler does not understand. So the best choice is to use just a plain text edit or a program such as Atom (link provided below).

Atom is a great little text editor as it allows us to edit all the files in the project folder. We can look at the errors produced when compiling our program beside the Assembly code, which makes it much easier to debug. Atom has a great plugin that will highlight the assembly code in different colours, to make it easier to read. So we can quickly identify what are instructions and what is data?

To help make life easier, I have created a batch file called Make.BAT. The purpose of the file is to compile the assembly program and produce an output file than can be programmed into the ROM of the computer.

As you can see this Make file is very simple. In the first line we just call the as6801 assembler program and pass in a few switch parameters (-xlos), as well as the assembly source file name retro.asm.

The second line of the Make file calls the linker program, where we pass in the output of the assembler program to produce the file we can load into our ROM. We also pass in the name of the linker file which contains the commands for the linker program.

The retro.lnk file just contains the switch parameters for the linker, the name of the input file, the name of the output file and then the end command for the linker.

When we run the MAKE.BAT command, we get a file called retro.s19, which contains the code that the programer will use to program the ROM with this software.

There are a few steps in the process as you can see, but having this MAKE.BAT makes its very simple to produce the file that the programmer can use from the assembly source code.

Below you will find ZIP file which contains the first draft version of the source code (untested), if you want to have a look. This code was pulled from projects that I had developed back in the late 80’s and early 90’s for this Micro.

ASxxxx Cross Assembler

Atom Text Editor


Retro Computer Build Part 3 – Console Port

So far we have discussed getting the Micro operational with the basic control lines, some ROM to hold the firmware, and RAM for the storage of data.

What about communicating directly to the Micro? How are we going to interact with it?

One of the reasons why this Micro was chosen, was because it has a built in UART. A UART is a port, that allows communications to and from another computer in a serial manner (one piece at a time). Serial communications are the most common form of communication methods used for computer to computer communications.

Initially, we will use the console port to interact with the Micro, as its primary interface. Over this interface, we will be able to mentor the internal registers of the Micro, write code, and perform some basic functions that will all help get the Micro operational.

There are different forms of serial communications. Some of these include USB, SATA, ADSL, Wi-Fi, and Ethernet. Each of these have their own advantages and disadvantages and specialised use cases. We will be using the RS232 serial communication on this console port.

In its day RS232 was a very common communication standard (it’s been around since 1962, it’s older than me). It’s not found in many new computers any more, as it has been replaced by USB. To enable RS232 for this Micro, we need to add a transceiver, which will convert the serial signals on the Micro to RS232 compliant levels.

As only some modern PC’s have an RS232 port, we may want to provide an alternative method, to allow communication over USB. If we bring out the serial connections from the Micro to a header, we could then connect this to a TTL to USB transceivers. This  now gives us the ability to plug this USB cable into a USB port on a PC or even an Apple Mac.

This is the approach that I’m thinking of taking, as if I don’t want to communicate over RS232. I could just pop-out the RS232 transceiver and plug in a TTL to USB transceiver into a header on the PCB. Then I could plug the transceiver into a USB port only computer and with a terminal program, I can start talking to the Micro.

We will be adding a full RS232 port to the Micro at a later date, as well as an RS485 port for industrial communications(more on that later in the build).

I plan to use a Maxim MAX222 transceiver, which gives us two transmitter & receiving lines that can be connected to the Micro. We are only going to use one of each of these. We might use the other two unused lines for control signals. The nice thing about this chip is that it has a sleep mode, where the chip will go to sleep when the sleep line is tied low. This device generates both the positive and negative supply rails for the RS232 port.


Retro Computer Build Testing – 01 Control Signals

In the above image, you can see where I have begun to test the control signals on the Micro. An old Thandar Logic Analyser TA100 was used to test these signals. Any modern logic analyser would also work, but I’m trying to keep this retro, or maybe I was just too lazy to plug in a USB logic analyser to my laptop and set it all up. I’ll let you decide.

You can see in the picture that the Micro’s clock E, the Read/Write line and the address strobe line, have been brought out of the Micro. The E and Read/Write line are inputs to the 74HC00 NAND gate logic, which is generating both a Read Enable and Write Enable signal, both of which are active low.

I’ll upload a quick video on these control signals when testing the address decoder logic.

All initial tests pass with no issues. So far so good.